HalpRegisterDmaChannel

NTSTATUS __stdcall HalpRegisterDmaChannel(_DMA_CHANNEL_INITIALIZATION_BLOCK *ChannelDescription){
  INT64 v2; 
  ULONG ControllerId; 
  int v4; 
  INT64 v5; 
  __int64 ChannelNumber; 
  __int64 v7; 

  if( ChannelDescription->Header.TableVersion != 1 )
    return -1073741811;
  if( ChannelDescription->Header.TableSize != 36 )
    return -1073741811;
  v2 = qword_140C49B00;
  if( (INT64 *)qword_140C49B00 == &qword_140C49B00 )
    return -1073741811;
  ControllerId = ChannelDescription->ControllerId;
  while( 1 )
  {
    v4 = *(_DWORD *)(v2 + 32);
    v5 = v2;
    if( v4 == ControllerId )
      break;
    v2 = *(_QWORD *)v2;
    if( (INT64 *)v2 == &qword_140C49B00 )
    {
      if( v4 != ControllerId )
        return -1073741811;
      break;
    }
  }
  ChannelNumber = ChannelDescription->ChannelNumber;
  v7 = *(_QWORD *)(v5 + 56) + 160 * ChannelNumber;
  *(_DWORD *)v7 = ChannelNumber;
  *(_BYTE *)(v7 + 6) = 0;
  *(_WORD *)(v7 + 4) = 1;
  *(_DWORD *)(v7 + 120) = ChannelDescription->CommonBufferLength;
  *(_QWORD *)(v7 + 128) = 0i64;
  *(_QWORD *)(v7 + 136) = 0i64;
  *(_QWORD *)(v7 + 8) = 0i64;
  *(_QWORD *)(v7 + 16) = 0i64;
  *(_QWORD *)(v7 + 24) = 0i64;
  *(_DWORD *)(v7 + 32) = 0;
  *(_QWORD *)(v7 + 64) = HalpDmaControllerDpcRoutine;
  *(_DWORD *)(v7 + 40) = 275;
  *(_QWORD *)(v7 + 72) = v7;
  *(_QWORD *)(v7 + 96) = 0i64;
  *(_QWORD *)(v7 + 56) = 0i64;
  *(_QWORD *)(v7 + 152) = v7 + 144;
  *(_QWORD *)(v7 + 144) = v7 + 144;
  *(_BYTE *)(v7 + 104) = ChannelDescription->GeneratesInterrupt;
  if( ChannelDescription->GeneratesInterrupt )
  {
    *(_DWORD *)(v7 + 108) = ChannelDescription->Gsi;
    *(_DWORD *)(v7 + 112) = ChannelDescription->InterruptPolarity;
    *(_DWORD *)(v7 + 116) = ChannelDescription->InterruptMode;
  }
  if( !*(_DWORD *)(v7 + 120) || *(_QWORD *)(v5 + 144) )
    return 0;
  else
    return -1073741811;
}

Referenced by: