HalpHvInitMcaStatusMsrCache

VOID __stdcall HalpHvInitMcaStatusMsrCache(){
  unsigned __int64 v0; 
  INT64 v1; 
  ULONG_PTR v2; 
  int *v3; 
  int v4; 
  int v5; 
  __int64 v6; 
  int v7; 
  __int64 v8; 
  unsigned __int64 v9; 
  if( !HalpHvMcaStatusCacheInitialized )
  {
    if( !HalpMcaNumberOfBanks )
    {
      v0 = __readmsr(0x179u);
      HalpMcaNumberOfBanks = v0;
    }
    v1 = (unsigned __int8)HalpMcaNumberOfBanks;
    v2 = 4i64 * (unsigned __int8)HalpMcaNumberOfBanks;
    LODWORD(HalpHvMcaBankCount) = (unsigned __int8)HalpMcaNumberOfBanks;
    if( v2 )
    {
      HalpHvMcaStatusMsrIndices = HalpMmAllocCtxAlloc(
                                    (unsigned __int8)HalpMcaNumberOfBanks,
                                    4i64 * (unsigned __int8)HalpMcaNumberOfBanks);
      v3 = (int *)HalpHvMcaStatusMsrIndices;
      if( !HalpHvMcaStatusMsrIndices )
        KeBugCheckEx(0xACu, v2, 0i64, (ULONG_PTR)"minkernel\\hals\\lib\\hv\\hvintel.c", 0x613ui64);
      if( (_DWORD)HalpHvMcaBankCount )
      {
        v4 = 1025;
        v5 = -1073733631;
        v6 = (unsigned int)HalpHvMcaBankCount;
        do
        {
          if( HalpGetCpuVendor() != 1 || (v7 = v5, !HalpMcaScalableRasSupported) )
            v7 = v4;
          *v3 = v7;
          v5 += 16;
          ++v3;
          v4 += 4;
          --v6;
        }
        while( v6 );
      }
    }
    else
    {
      HalpHvMcaStatusMsrIndices = 0i64;
    }
    HalpHvMcaLpCount = HalpQueryMaximumRegisteredProcessorCount(v1);
    v9 = 8 * (unsigned int)HalpHvMcaBankCount * (unsigned __int64)(unsigned int)HalpHvMcaLpCount;
    if( v9 )
    {
      HalpHvMcaStatusCache = HalpMmAllocCtxAlloc(v8, v9);
      if( !HalpHvMcaStatusCache )
        KeBugCheckEx(0xACu, v9, 0i64, (ULONG_PTR)"minkernel\\hals\\lib\\hv\\hvintel.c", 0x62Dui64);
    }
    else
    {
      HalpHvMcaStatusCache = 0i64;
    }
    HalpHvMcaStatusCacheInitialized = 1;
  }
}

Referenced by:

HalpMceInit